1. Field of the Invention
The present invention relates generally to the fabrication of integrated circuits and, more particularly, to soft baking a semiconductor wafer so that photoresist layers are free of surface voids or craters.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Microprocessors and memory devices, such as static and dynamic random access memories (DRAM and SRAM), are complex integrated circuits that are used in a wide variety of applications throughout the world. Such applications include personal computers, control systems, telephone networks, and a host of other consumer products. Despite their complexity, price competition requires that microprocessor and memory designs be inexpensive to manufacture while at the same time maintaining high performance and reliability. Furthermore, the relative size of these electronic devices is steadily decreasing as technology advances. Generally, the reduction in the overall footprint of electronic components is due to the consumer's demand for smaller, faster, and more powerful electronic devices.
Integrated circuits, such as memory devices, are fabricated on a semiconductor wafer using a variety of manufacturing processes, and they are generally mass produced by fabricating thousands of identical circuit patterns on a single semiconductor wafer and subsequently dividing them into identical die or chips. While integrated circuits are commonly referred to as “semiconductor devices,” they are in fact fabricated from semiconductor wafers having various materials including semiconductors (such as silicon in the wafer substrate), conductors (such as metals or doped polysilicon), and insulators (such as silicon oxide used, for example, to separate conductive elements). To produce integrated circuits many commonly known processes are used to modify, remove, and deposit material onto the semiconductor wafer. Processes such as ion implantation, sputtering, etching, physical vapor deposition (PVD), chemical vapor deposition (CVD) and variations thereof, such as plasma enhanced CVD, are among those commonly used.
The various features and circuit elements may be patterned on the semiconductor wafer through the use of a masking process known as photolithography. In the masking process, a photomask containing the pattern of the structure to be fabricated is created, and the wafer is coated with a light-sensitive material called photoresist. The wafer is then baked (called a “soft bake” or “post-apply bake”) to remove solvent from the resist and/or to harden the resist layer. The resist-coated wafer is then exposed to ultraviolet light through the photomask to develop the photoresist layer. After developing, an etchant may be use to remove selected portions of resist according to the desired pattern. Once the specified parts of the resist are removed, the wafer is treated by one of the processes (i.e., ion implantation, sputtering, etching, PVD, and CVD) mentioned above to modify the portions of the wafer unprotected by the resist. After such processing, the remaining resist is stripped or dissolved, using an appropriate solvent.
Conductive layers are generally separated by insulating layers, such as an interlayer dielectric (ILD), which may be, for example, silicon oxide, silicon nitride, or a polyimide film. After an ILD layer is applied to cover the conductive layer, the ILD layer may then be coated with photoresist to start the masking/patterning of the next conductive layer. A problem, however, with application of ILD layers and subsequent resist layers is the typical formation of air pockets between elements or structures on the semiconductor wafer surface. The ILD material and/or resist material, for example, may not conform to the surface of the semiconductor wafer but instead form a bridge between structures on the wafer, resulting in gaps underneath the ILD layer or resist layer.
One of the objectives in photolithography is to transfer a well-defined pattern with minimal ambiguities or anomalies. As mentioned above, photoresist, when applied, may contain a solvent that makes it semi-fluid to facilitate its deposition onto the wafer. Once applied, the “soft bake” process displaces the solvent from the resist and hardens the resist layer. In the soft bake, the wafer is baked, for example, at 130° C. for 90 seconds in a thermal unit, in a temperature chamber, or on a hot plate. One of the problems during the soft bake is that air trapped below the resist layer heats and expands to the surface of the resist. The escaping air bursts through the resists to form craters as the resist hardens because the resist is generally not fluid enough to re-form. Subsequent etching of affected areas (craters) of the resist layer may adversely affect the desired pattern as well as portions of the underlying topology. Typically, tens, hundreds, or even thousands of microscopic craters may be formed on a single semiconductor wafer.
Consecutive layers of ILD material and/or relatively large amounts of ILD material may fill gaps in the underlying topology and thus reduce the amount of air that is trapped. Furthermore, consecutive, thick layers of ILD may also act as a more effective barrier that reduces the amount of air reaching the resist layer, and thus reduces the number of craters. However, the excessive use of ILD material and other inefficient approaches are costly and may not reduce or eliminate the formation of resist craters.
The present invention may be directed to one or more of the problems set forth above.